arm: mvebu: Add v7_outer_cache_disable function for AXP & A38x

Add functionality to correctly disable the L2 cache on the Armada XP
and 38x platforms.

Without this, booting into Linux on ClearFog (A38x) results in a hangup
without any output on the serial console at all. Even with earlyprintk
enabled.

Signed-off-by: Stefan Roese <[email protected]>
Cc: Luka Perkov <[email protected]>

diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 74087e29031ee83cc63db4d34c93ceddd1fd033e..fd56c99c925501113e896a7f46005ced3d642449 100644 (file)
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -422,3 +422,11 @@ void v7_outer_cache_enable(void)
                setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);
        }
 }
+
+void v7_outer_cache_disable(void)
+{
+       struct pl310_regs *const pl310 =
+               (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
+
+       clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);
+}